1. Field of the Invention
This invention relates to electronic circuit technology, and more particularly, to a switched-capacitor charge pump device which is designed for integration to a circuit system, such as a PLL (phase-locked loop) circuit system, for generation of an output direct-current (DC) voltage with a wide amplitude range.
2. Description of Related Art
In PLL (phase-locked loop) and DLL (delay-locked loop) circuitry, the charge pump is an essential circuit component which is capable of being driven by a pair of phase-difference signals (which respectively indicate the lagging or leading of the output frequency generated by the PLL or DLL circuitry with respect to a reference frequency) and responsively generating an output of a DC voltage whose amplitude is proportional to the phase difference between the output frequency and the reference frequency. Fundamentally, the lagging of the output frequency against the reference frequency will result in a negative phase-difference signal which is presented as a pump-up enable signal (UP) to the charge pump; whereas the leading of the output frequency will result in a positive phase-difference signal which is presented as a pump-down enable signal (DN) to the charge pump. The output of the charge pump is a DC voltage which is used as a control voltage for a VCO (voltage-controlled oscillation) unit in PLL circuitry or a VCDL (voltage-controlled delay line) unit in DLL circuitry for adjusting the output frequency to match in phase with the reference frequency.
Theoretically, the output frequency range of a PLL-VCO circuit is proportional to the amplitude range of the input control voltage, i.e., the amplitude range of the DC output of the charge pump. Accordingly, if we want to increase the PLL-VCO output frequency range, this can be achieved simply by increasing the amplitude range of the DC output of the charge pump.
In practice, however, traditional charge pump circuits are only capable of offering a limited amplitude range of DC output; and therefore, the PLL-VCO circuits are also only capable of offering a limited range of frequency output in proportion to the voltage output of the charge pump. For instance, the charge pump circuitry constructed using a 90 nanometer CMOS technology of nowadays can only provide an output DC voltage with an amplitude range from 0.3 V to 0.7 V, i.e., an amplitude span of only 0.4 V, at 1V supply.
Moreover, traditional charge bump circuits are typically constructed on a circuit architecture that includes both a PMOS-based current source and an NMOS-based current source. One drawback to the use of two different MOS types of current sources in the same charge pump circuit architecture is that it would result in a mismatch in electrical characteristics between the two different types of current sources and thus result in a poor electrical performance.